- Market Value (2025): USD 205.2 Mn
- Estimated Value (2026): USD 238.0 Mn
- Forecast Value (2036): USD 1,050.0 Mn
- CAGR (2026-2036): 16.0%
What is the Embedded Bridge Placement Market forecast to be worth by 2036?
USD 238.0 million in 2026 to USD 1,050.0 million by 2036, at a 16.0% CAGR.
- The Embedded Bridge Placement Market crossed a valuation of USD 205.2 million in 2025, supported by demand from OSAT providers serving Silicon bridges workflows that require placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity.
- Demand is projected to increase from USD 238.0 million in 2026 to USD 1,050.0 million by 2036.
- The market is forecast to record a 16.0% CAGR from 2026 to 2036 as process position and precision class, placement accuracy cascade and yield economics of placement remain central purchase reasons.

What are the defining numbers behind Embedded Bridge Placement Market growth?
USD 812.0 million absolute opportunity is expected by 2036.
- Demand Drivers in the Market
- Process position and precision class: Demand for dedicated bridge-placement tools stems from where this step sits in the flow: precise cavities are cut into the laminate material, small silicon bridges are then placed into them and held with a specialized adhesive - a step that happens in substrate fabs at panel scale, not in wafer fabs, and needs equipment purpose-built for that environment. [2]
- Placement accuracy cascade: Placement tolerance requirements are set by what happens downstream, not by the placement step itself: bridge placement error propagates into die attach, where fine-pitch microbumps must align to bridge pads while C4 bumps simultaneously align to substrate pads, pushing the finest bridge pad pitches toward thermocompression bonding. [3]
- Yield economics of placement: EMIB's cost and yield advantage over silicon interposers only holds if bridge embedding stays high-yield, since only the small bridge area needs to be defect-free - which is exactly why bridge placement accuracy and substrate-integration complexity are named as EMIB's defining challenges, and why buyers scrutinize placement equipment precision closely. [4]
- Bond-process control: The precision bar for placement tools is being set by adjacent bonding equipment: automatic flip-chip bonders already deliver plus-or-minus 0.3 micrometer post-bond accuracy, sub-micron reproducible placement is available across a 450x150 mm field, university advanced-packaging lines specify plus-or-minus 0.5 micrometer X/Y and plus-or-minus 0.15 degree theta, and TCB bonders run 1,000-2,000 units per hour with micron-level X/Y/Z/tilt control - a benchmark bridge-placement tools must match. [5][6]
- Key Segments Analyzed
- By Placement Technology: Flip-chip bonders are projected to hold 32.0% share in 2026, supported by a clear process advantage: Flip-chip bonders combine vision alignment, controlled force and thermal handling for placing a thin silicon bridge onto fine-pitch substrate features. The equipment already addresses many of the registration and contact requirements of advanced die attach.
- By Placement Accuracy: <1 um is projected to hold 42.1% share in 2026, supported by a clear process advantage: Sub-micrometer placement protects overlap between bridge terminals and the surrounding build-up wiring after substrate distortion and lamination are included. It also preserves routing density at the localized high-bandwidth interface.
- By Bridge Type: Silicon bridges are projected to hold 46.5% share in 2026, supported by a clear process advantage: Silicon bridges provide fine lithographic routing, mature microbump or hybrid interfaces and a thermal expansion behavior familiar to semiconductor assembly. They are the established route for localized high-density interconnect.
- By Substrate Format: Organic panel is projected to hold 44.2% share in 2026, supported by a clear process advantage: Organic panels combine the cost structure of package substrates with a local silicon bridge for high-density routing. Panel handling also supports multiple placements per workpiece and high assembly throughput.
- By End User: OSAT providers are projected to hold 32.1% share in 2026, supported by a clear process advantage: OSAT providers integrate bridge placement with die attach, molding and package assembly and can optimize the sequence around customer package designs. Their equipment must switch between high-value, relatively low-volume product variants.
- Analyst Opinion at Fact.MR
- Shambhu Nath Jha, Sr. Consultant at Fact.MR, states, 'Buyers should evaluate the complete process sequence around placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity. Technical review should focus on repeatability, integration, defect control and production throughput rather than a single headline specification. Suppliers that connect tool performance to measurable yield and qualification results are likely to build trust faster.'
- Strategic Implications
- Procurement should focus on post-embed registration and planarity, beyond pick-and-place coordinates before lamination.
- Equipment suppliers should document how their systems address the challenge of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity across production-representative wafers, panels, dies or packages.
- Procurement teams can compare process capability, integration burden, service coverage and qualification evidence before prioritizing nominal throughput or a single accuracy claim.
Taiwan is projected to record a 17.8% CAGR as leading foundry production, advanced packaging and a dense OSAT and substrate supply chain supports relevant capital spending; South Korea is projected to record a 16.8% CAGR as high-volume memory, HBM and vertically integrated semiconductor manufacturing supports relevant capital spending; Malaysia is projected to record a 16.5% CAGR as large-scale outsourced assembly, test and package manufacturing supports relevant capital spending; USA is projected to record a 17.6% CAGR as leading-edge logic, high-performance computing, federally supported semiconductor R&D and a large domestic equipment base supports relevant capital spending; while Japan is projected to record a 16.1% CAGR as semiconductor equipment, materials, inspection and memory-process expertise supports relevant capital spending through 2036.
How does the Embedded Bridge Placement Market break down by segment?
Flip-chip bonders leads Placement Technology with a 32.0% share, while <1 um accounts for 42.1% of Placement Accuracy in 2026.
Why do Flip-chip bonders lead Placement Technology?
Flip-chip bonders are projected to account for 32.0% share in 2026.

Flip-chip bonders combine vision alignment, controlled force and thermal handling for placing a thin silicon bridge onto fine-pitch substrate features. The equipment already addresses many of the registration and contact requirements of advanced die attach. General high-accuracy pick-and-place systems offer flexibility, but they may lack the bond-force, temperature and process integration required for embedded bridge attachment. ±0.3 Μm post-bond accuracy automatic flip-chip bonders (PicoTech); sub-micron reproducible placement with 450×150 mm field (Finetech FINEPLACER sigma); ±0.5 µm X/Y, ±0.15° theta at university advanced-packaging lines; 1,000-2,000 UPH TCB bonders with micron-level X/Y/Z/tilt control (K&S). [5][6] Buyers therefore tend to treat flip-chip bonders as the practical choice when qualification must balance process capability, repeatability and production economics.
Why does <1 um lead Placement Accuracy?
<1 um is projected to account for 42.1% share in 2026.

Sub-micrometer placement protects overlap between bridge terminals and the surrounding build-up wiring after substrate distortion and lamination are included. It also preserves routing density at the localized high-bandwidth interface. The 1-3 micrometer class is easier to achieve but can consume too much of the alignment budget for the finest bridge designs. EMIB's cost/yield advantage versus silicon interposers exists only if bridge embedding stays high-yield: only requires the small bridge area to be defect-free - but bridge placement accuracy and substrate-integration complexity are named as EMIB's unique challenges. [4] Buyers therefore tend to treat <1 um as the practical choice when qualification must balance process capability, repeatability and production economics.
Why do Silicon bridges lead Bridge Type?
Silicon bridges are projected to account for 46.5% share in 2026.

Silicon bridges provide fine lithographic routing, mature microbump or hybrid interfaces and a thermal expansion behavior familiar to semiconductor assembly. They are the established route for localized high-density interconnect. Glass bridges can improve electrical or dimensional characteristics in selected designs, but their fabrication and attach ecosystem is less established. EMIB manufacturing: precise cavities are created in the laminate material where the silicon bridges will be placed. The small silicon bridges are then carefully placed into these cavities and are held in place with a specialized adhesive. [2] Buyers therefore tend to treat silicon bridges as the practical choice when qualification must balance process capability, repeatability and production economics.
Why does Organic panel lead Substrate Format?
Organic panel is projected to account for 44.2% share in 2026.

Why do OSAT providers lead End User?
OSAT providers are projected to account for 32.1% share in 2026.

OSAT providers integrate bridge placement with die attach, molding and package assembly and can optimize the sequence around customer package designs. Their equipment must switch between high-value, relatively low-volume product variants. Foundries participate in advanced packaging, but OSATs retain a broad installed base and customer mix for bridge-based assembly. Bridge placement error propagates into die attach: the die's fine-pitch microbumps must align to bridge pads while C4 bumps align to substrate pads - bridge placement tolerance is set by the finest bridge pad pitch, with TCB used at the finest pitches. [3] Buyers therefore tend to treat OSAT providers as the practical choice when qualification must balance process capability, repeatability and production economics.
What is accelerating Embedded Bridge Placement Market adoption, and what is holding it back?
The strongest accelerator is process position and precision class, while the main restraint is that bridge shift during adhesive cure or lamination can consume the placement margin after the tool has released the part.
Drivers Impact Analysis
| DRIVER | (~) % IMPACT ON CAGR | GEOGRAPHIC RELEVANCE | IMPACT TIMELINE |
|---|---|---|---|
| Process position and precision class | +4.5% | Global leading-edge fabs | Medium term (2-4 years) |
| Placement accuracy cascade | +3.7% | Global leading-edge fabs | Medium term (2-4 years) |
| Yield economics of placement | +3.0% | Global leading-edge fabs | Medium term (2-4 years) |
| Bond-process control | +2.4% | Global leading-edge fabs | Medium term (2-4 years) |
- Process position and precision class: EMIB manufacturing: precise cavities are created in the laminate material where the silicon bridges will be placed. The small silicon bridges are then carefully placed into these cavities and are held in place with a specialized adhesive. [2]
- Placement accuracy cascade: Bridge placement error propagates into die attach: the die's fine-pitch microbumps must align to bridge pads while C4 bumps align to substrate pads - bridge placement tolerance is set by the finest bridge pad pitch, with TCB used at the finest pitches. [3]
- Yield economics of placement: EMIB's cost/yield advantage versus silicon interposers exists only if bridge embedding stays high-yield: only requires the small bridge area to be defect-free - but bridge placement accuracy and substrate-integration complexity are named as EMIB's unique challenges. [4]
- Bond-process control: ±0.3 Μm post-bond accuracy automatic flip-chip bonders (PicoTech); sub-micron reproducible placement with 450×150 mm field (Finetech FINEPLACER sigma); ±0.5 µm X/Y, ±0.15° theta at university advanced-packaging lines; 1,000-2,000 UPH TCB bonders with micron-level X/Y/Z/tilt control (K&S). [5][6]
Opportunity Impact Analysis
| OPPORTUNITY | (~) % IMPACT ON CAGR | GEOGRAPHIC RELEVANCE | IMPACT TIMELINE |
|---|---|---|---|
| Bridge proliferation raises placement throughput demand | +2.7% | Global leading-edge fabs | Short term (<=2 years) |
| Panel-scale embedding | +2.1% | Global leading-edge fabs | Medium term (2-4 years) |
| Adhesive-secured placement vs. self-assembly | +1.6% | Global leading-edge fabs | Short term (<=2 years) |
- Adhesive-secured placement vs. self-assembly: Documented production uses adhesive-held bridges in cavities (Uplatz); research explores self-aligned/fluidic placement but adhesive-into-cavity remains the manufacturing baseline.
Restraints Impact Analysis
| RESTRAINT | (~) % IMPACT ON CAGR | GEOGRAPHIC RELEVANCE | IMPACT TIMELINE |
|---|---|---|---|
| Primary qualification constraint | -2.4% | Global leading-edge fabs | Medium term (2-4 years) |
| Process-window sensitivity | -1.9% | Global leading-edge fabs | Medium term (2-4 years) |
| Thermal and mechanical distortion | -1.4% | Global leading-edge fabs | Medium term (2-4 years) |
- Primary qualification constraint: Bridge shift during adhesive cure or lamination can consume the placement margin after the tool has released the part. [4]
- Process-window sensitivity: EMIB's cost/yield advantage versus silicon interposers exists only if bridge embedding stays high-yield: only requires the small bridge area to be defect-free - but bridge placement accuracy and substrate-integration complexity are named as EMIB's unique challenges. [4]
Which countries are scaling Embedded Bridge Placement Market fastest?
In USA, Embedded Bridge Placement Market is projected to advance at 17.6% CAGR, supported by leading-edge logic, high-performance computing, federally supported semiconductor R&D and a large domestic equipment base.
- Countries differ less by the headline CAGR than by the type of semiconductor work creating demand for the Embedded Bridge Placement Market.
- Taiwan follows a pathway shaped by leading foundry production, advanced packaging and a dense OSAT and substrate supply chain. USA takes a different path through leading-edge logic, high-performance computing, federally supported semiconductor R&D and a large domestic equipment base.
- South Korea remain aligned through distinct combinations of device production, equipment development and advanced packaging investment.
- Malaysia develops through large-scale outsourced assembly, test and package manufacturing, while Japan relies on semiconductor equipment, materials, inspection and memory-process expertise.
- Markets with similar CAGRs can follow different development paths because installed fabs, device mix, local equipment capability, export controls and qualification cycles differ.
The full report compares the six named country markets within the wider regional coverage of North America, Latin America, Europe, East Asia, South Asia & Oceania, and the Middle East & Africa.

| COUNTRY | CAGR 2026 to 2036 |
|---|---|
| Taiwan | 17.8% |
| USA | 17.6% |
| South Korea | 16.8% |
| Malaysia | 16.5% |
| Japan | 16.1% |
What is driving Taiwan's growth through 2036?
17.8% CAGR, supported by leading foundry production, advanced packaging and a dense OSAT and substrate supply chain.
TSMC CoWoS-L (LSI bridges) - bridge-bearing silicon interposer variant with different placement flow (bridges fabricated in-interposer rather than embedded in laminate). This environment creates a clear qualification pathway for the Embedded Bridge Placement Market because buyers must solve the problem of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity at production scale.
What is driving USA's growth through 2036?
17.6% CAGR, supported by leading-edge logic, high-performance computing, federally supported semiconductor R&D and a large domestic equipment base.

Intel (EMIB inventor; Arizona substrate integration; glass+EMIB demo); CHIPS-funded substrate capability building. This environment creates a clear qualification pathway for the Embedded Bridge Placement Market because buyers must solve the problem of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity at production scale.
What is driving South Korea's growth through 2036?
16.8% CAGR, supported by high-volume memory, HBM and vertically integrated semiconductor manufacturing.
Samsung Electro-Mechanics (substrate + glass JV with Sumitomo), LG Innotek (2028 glass target). This environment creates a clear qualification pathway for the Embedded Bridge Placement Market because buyers must solve the problem of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity at production scale.
What is driving Malaysia's growth through 2036?
16.5% CAGR, supported by large-scale outsourced assembly, test and package manufacturing.
Malaysia combines large-scale outsourced assembly, test and package manufacturing with a 12.4% share of 2026 demand across the six profiled countries. EMIB manufacturing: precise cavities are created in the laminate material where the silicon bridges will be placed. [2] The commercial link is the need to solve the problem of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity as capacity and process complexity increase.
What is driving Japan's growth through 2036?
16.1% CAGR, supported by semiconductor equipment, materials, inspection and memory-process expertise.
Ibiden/Shinko substrate fabs; TEL/Fujikura panel tools. This environment creates a clear qualification pathway for the Embedded Bridge Placement Market because buyers must solve the problem of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity at production scale.
Who leads the Embedded Bridge Placement Market?
ASMPT and BESI lead the competitive landscape, followed by Kulicke & Soffa and Shinkawa as the next tier of challengers.
ASMPT participates through die placement, thermocompression bonding and packaging automation, with relevance determined by its ability to address the challenge of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity. BESI participates through high-accuracy die placement and hybrid-bonding assembly. Precision placement platforms adaptable to cavity embedding. Kulicke & Soffa participates through advanced die attach and packaging assembly, with relevance determined by its ability to address the challenge of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity. Shinkawa participates through precision die bonding and semiconductor assembly, with relevance determined by its ability to address the challenge of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity.
Palomar Technologies holds a more specialized role through precision die attach and photonics or specialty packaging, particularly where custom integration and service coverage affect qualification. Panasonic holds a more specialized role through factory automation and semiconductor assembly equipment, particularly where custom integration and service coverage affect qualification.
Competition is expected to center on repeatable process performance, integration with adjacent modules, installed-base service and documented capability to address the challenge of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity. Buyers are likely to compare accuracy, defect prevention, throughput, recipe stability and the completeness of the delivered process cell.
Which companies are the key providers?
Key companies include ASMPT; BESI; Kulicke & Soffa; Shinkawa; Palomar Technologies; Panasonic.
- ASMPT
- BESI
- Kulicke & Soffa
- Shinkawa
- Palomar Technologies
- Panasonic
Bibliography
- [1] Semiconductorx. (n.d.). Packaging Emib.
- [2] Eureka. (n.d.). Report Compare Silicon Interposers Vs Emib For Multi Die Yield Sensitivity.
- [3] Picotech. (n.d.). Automatic Sub Micron Flip Chip Bonding.
- [4] Finetech. (n.d.). Fineplacer Sigma.
- [5] Akrometrix. (n.d.). Fea Tuning With Shadow Moire Data.
This Report Addresses
- The report provides strategic intelligence on Embedded Bridge Placement Market across Placement Technology and Placement Accuracy choices that shape purchasing decisions.
- Segment analysis covers Flip-chip bonders as the share leader within the 2026 market structure.
- Regional outlook evaluates Taiwan alongside South Korea and Malaysia, while USA and Japan complete the growth comparison.
- Competitive analysis profiles ASMPT and BESI alongside Kulicke & Soffa and Shinkawa, followed by additional active providers.
- Use-case assessment covers the categories and applications that shape demand in the Embedded Bridge Placement Market across the forecast period.
What does the Embedded Bridge Placement Market cover?
The market covers equipment and process systems configured to address the challenge of placing small silicon or glass bridges into substrate cavities with micron-class registration and controlled planarity.
Embedded bridge placement equipment places small silicon bridge dies into cavities in organic (or glass) package substrates with micron-level accuracy before build-up lamination - the bridge embedding step of EMIB-class flows. The segment sits between die bonding and substrate fabrication: placement happens in laminate substrate fabs, not wafer fabs, at panel scale, with the bridge held by adhesive and then buried.
Commercial value arises from the complete configured system, including process control, handling, software and integrated modules required for repeatable operation. Finished semiconductor devices, package value and unrelated parent-market equipment are excluded.
What is included in the scope?
The scope includes systems used by osat providers and the other end-user groups listed in the segmentation.
The market is segmented by Placement Technology, including Flip-chip bonders, High-accuracy pick-and-place, Thermocompression placement, Laser-assisted placement, Collective placement; Placement Accuracy, including <1 um, 1-3 um, 3-5 um, 5-10 um, >10 um; Bridge Type, including Silicon bridges, Glass bridges, Photonic bridges, Passive interconnect bridges, Active bridges; Substrate Format, including Organic panel, Wafer-level carrier, Glass core panel, Ceramic substrate, Custom carriers; End User, including OSAT providers, Foundries, IDMs, Substrate manufacturers, R&D institutes.
Integrated handling, metrology, cleaning, activation, process-control or support modules are included when delivered as part of the configured market system.
What is excluded from the scope?
The scope excludes unrelated semiconductor equipment, standalone materials and components sold independently of the configured system.
It also excludes facility construction, cleanroom infrastructure, the value of processed wafers or packages, and adjacent process steps that are not part of the defined equipment category.
How Was the Analysis Built?
Fact.MR is of the opinion that this assessment combines structured market analysis with a review of public information and industry evidence relevant to the market.
- Market Assessment: The analysis considers demand patterns, supply conditions, segment mix, country activity, company participation, and adoption trends.
- Evidence Review: Public company disclosures, government and regulatory publications, trade information, technical literature, and industry records inform the assessment.
- Validation and Updates: Findings are cross-checked against available market indicators and reviewed when material market developments emerge.
What is the report's scope and coverage?

| Attribute | Details |
|---|---|
| Quantitative Units | USD Million in 2026 to USD Million by 2036 at a CAGR |
| Market Definition | Embedded bridge placement equipment places small silicon bridge dies into cavities in organic (or glass) package substrates with micron-level accuracy before build-up lamination - the bridge embedding step of EMIB-class flows. The segment sits between die bonding and substrate fabrication: placement happens in laminate substrate fabs, not wafer fabs, at panel scale, with the bridge held by adhesive and then buried. |
| Placement Technology | Flip-chip bonders; High-accuracy pick-and-place; Thermocompression placement; Laser-assisted placement; Collective placement |
| Placement Accuracy | <1 um; 1-3 um; 3-5 um; 5-10 um; >10 um |
| Bridge Type | Silicon bridges; Glass bridges; Photonic bridges; Passive interconnect bridges; Active bridges |
| Substrate Format | Organic panel; Wafer-level carrier; Glass core panel; Ceramic substrate; Custom carriers |
| End User | OSAT providers; Foundries; IDMs; Substrate manufacturers; R&D institutes |
| Regions Covered | North America; Latin America; Europe; East Asia; South Asia & Oceania; Middle East & Africa |
| Countries Covered | Taiwan; South Korea; Malaysia; USA; Japan |
| Key Companies Profiled | ASMPT; BESI; Kulicke & Soffa; Shinkawa; Palomar Technologies; Panasonic |
| Forecast Period | 2026 to 2036 |
| Approach | Hybrid top-down and bottom-up approach using demand indicators across Placement Technology; Placement Accuracy; Bridge Type; Substrate Format; End User; country-level growth; company participation and adoption trends |
How is the market segmented?
-
By Placement Technology:
- Flip-chip bonders
- High-accuracy pick-and-place
- Thermocompression placement
- Laser-assisted placement
- Collective placement
-
By Placement Accuracy:
- <1 um
- 1-3 um
- 3-5 um
- 5-10 um
- >10 um
-
By Bridge Type:
- Silicon bridges
- Glass bridges
- Photonic bridges
- Passive interconnect bridges
- Active bridges
-
By Substrate Format:
- Organic panel
- Wafer-level carrier
- Glass core panel
- Ceramic substrate
- Custom carriers
-
By End User:
- OSAT providers
- Foundries
- IDMs
- Substrate manufacturers
- R&D institutes
-
By Region:
- North America
- Latin America
- Europe
- East Asia
- South Asia & Oceania
- Middle East & Afric
- Frequently Asked Questions -
Which Placement Technology leads the Embedded Bridge Placement Market?
Flip-chip bonders are projected to hold 32.0% share in 2026.
Which Placement Accuracy leads the Embedded Bridge Placement Market?
<1 um is projected to hold 42.1% share in 2026.
Which Bridge Type leads the Embedded Bridge Placement Market?
Silicon bridges are projected to hold 46.5% share in 2026.
Which Substrate Format leads the Embedded Bridge Placement Market?
Organic panel is projected to hold 44.2% share in 2026.
Which End User leads the Embedded Bridge Placement Market?
OSAT providers are projected to hold 32.1% share in 2026.
What CAGR is projected for Taiwan in the Embedded Bridge Placement Market?
Taiwan is projected to record a 17.8% CAGR from 2026 to 2036.
What CAGR is projected for USA in the Embedded Bridge Placement Market?
USA is projected to record a 17.6% CAGR from 2026 to 2036.
What CAGR is projected for China in the Embedded Bridge Placement Market?
China is projected to record a 17.4% CAGR from 2026 to 2036.
What CAGR is projected for South Korea in the Embedded Bridge Placement Market?
South Korea is projected to record a 16.8% CAGR from 2026 to 2036.
What CAGR is projected for Malaysia in the Embedded Bridge Placement Market?
Malaysia is projected to record a 16.5% CAGR from 2026 to 2036.
What CAGR is projected for Japan in the Embedded Bridge Placement Market?
Japan is projected to record a 16.1% CAGR from 2026 to 2036.
What is the primary driver of the Embedded Bridge Placement Market?
The primary driver is process position and precision class, supported by EMIB manufacturing: precise cavities are created in the laminate material where the silicon bridges will be placed.
What is the main restraint in the Embedded Bridge Placement Market?
Bridge shift during adhesive cure or lamination can consume the placement margin after the tool has released the part.